In general purpose, microprogrammable data processors, various solutions have been proposed to facilitate code compression in the micromachine. For example, in the Intel 8087 microprocessor, described in U.S. Pat. No. 4,338,675, the micromachine implements a subroutine call microinstruction. In the Motorola MC68000 microprocessor, described in U.S. Pat. No. 4,307,445, the microinstruction ROM is split into a conventional sequencing portion and a compressed control portion. In U.S. Pat. No. 3,983,539, a full two-level control store architecture is provided. While such mechanisms may be utilized effectively in some applications, in other applications such solutions tend to require unnecessarily complex control circuitry or may be excessively slow.